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INTEGRATED CIRCUITS
DATA SHEET
TDA9800 VIF-PLL demodulator and FM-PLL detector
Preliminary specification File under Integrated Circuits, IC02 July 1994
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
FEATURES * Suitable for negative vision modulation * Applicable for IF frequencies of 38.9 MHz, 45.75 MHz and 58.75 MHz * Gain controlled wide band VIF amplifier (AC coupled) * True synchronous demodulation with active carrier regeneration (ultra-linear demodulation, good intermodulation figures, reduced harmonics and excellent pulse response) * Peak sync AGC for negative modulation * Video amplifier to match sound trap and sound filter
TDA9800
* AGC output voltage for tuner; adjustable take-over point (TOP) * AFC detector without extra reference circuit * Alignment-free FM-PLL detector with high linearity * Stabilizer circuit for ripple rejection and to achieve constant output signals * 5 to 8 V positive supply voltage range, low power consumption (300 mW at +5 V supply voltage). GENERAL DESCRIPTION The TDA9800 is a monolithic integrated circuit for vision and sound IF signal processing in TV and VTR sets.
QUICK REFERENCE DATA SYMBOL VP IP Vi IF Gv Vo CVBS B S/N (W) 0.92/1.1 2.76/3.3 H Vo AF Tamb suppression of harmonics in video signal maximum AF output signal for THD < 1.5% (RMS value, pin 9) operating ambient temperature supply current vision IF input signal sensitivity (RMS value, pins 1 and 2) maximum vision IF input signal (RMS value, pins 1 and 2) IF gain control CVBS output signal on pin 7 (peak-to-peak value) -3 dB video bandwidth on pin 7 signal-to-noise ratio weighted; for video intermodulation attenuation PARAMETER positive supply voltage (pin 20) MIN. 4.5 51 - 70 64 1.7 6 56 56 56 35 0.8 -20 TYP. MAX. 5 60 50 150 70 2.0 8 59 62 62 40 - - 8.8 69 90 - 73 2.3 - - - - - - +70 UNIT V mA V mV dB V MHz dB dB dB dB V C
ORDERING INFORMATION EXTENDED TYPE NUMBER TDA9800 TDA9800T Note 1. SOT146-1; 1996 December 6. 2. SOT163-1; 1996 December 6. PACKAGE PINS 20 20 PIN POSITION DIL mini-pack MATERIAL plastic plastic CODE SOT146(1) SOT163A(2)
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
handbook, full pagewidth
VP = 5 V (9 V)
2fPC VP 20 GND 18 INTERNAL REFERENCE VOLTAGE TRAVELLING WAVE DIVIDER TPLL 6 VCO2 17 VCO1 16 AFC 15 9 Vo AF 10 CAF CAF
VCO
AFC
AF AMPLIFIER
IF input
Vi VIF1 1 Vi VIF2 2
3-STAGE IF-AMPLIFIER FREQUENCY DETECTOR AND PHASE DETECTOR VIDEO DEMODULATOR VIDEO AMPLIFIER
FM-PLL
Vi PC
CCS 4
TDA9800
sound mute TUNER AGC IF AGC AGC DETECTOR BUFFER AND NOISE CLIPPING 8 n.c. 13 Vo(vid) 14 Vi(vid) 11 Vi IC Vo CVBS 2 V (p-p)
7
3 TOP takeover point
12 TAGC
19 CAGC CAGC
5 MUTE
sound MUTE
tuner AGC output
SOUND TRAP 1 V (p-p)
SOUND FILTER video and intercarrier
MED329
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
PINNING SYMBOL Vi IF TADJ ADJ MUTE TPLL Vo CVBS n.c. Vo AF CAF Vi IC TAGC Vo VID Vi VID AFC VCO1 VCO2 GND CAGC VP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ground (0 V) AGC capacitor positive supply voltage tuner AGC take-over adjust (TOP) phase detector adjust sound mute switch PLL time constant of phase detector CVBS (positive) output signal not connected audio frequency output signal decoupling capacitor of audio frequency amplifier sound intercarrier input signal tuner AGC output video and sound intercarrier output signal video input signal to buffer amplifier automatic frequency control output VCO reference circuit for 2 fPC PIN vision IF differential input signal DESCRIPTION
TDA9800
handbook, halfpage
Vi VIF1 Vi VIF2 TOP
1 2 3
20 VP 19 CAGC 18 GND 17 VCO2 16 VCO1
CCS 4 MUTE 5
TPLL 6 Vo CVBS 7 n.c. 8 Vo AF 9 CAF 10
TDA9800
15 AFC 14 Vi(vid) 13 Vo(vid) 12 TAGC 11 Vi IC
MED330
Fig.2 Pin configuration.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
FUNCTIONAL DESCRIPTION Vision IF input The vision IF amplifier consists of three AC-coupled differential amplifier stages; each stage comprises a controlled feedback network by means of emitter degeneration. IF and tuner AGC The automatic control voltage to maintain the video output signal at a constant level is generated according to the transmission standard. Since the TDA9800 is suitable for negative modulation only the peak-sync level is detected. The AGC detector charges and discharges the capacitor on pin 19 to set the IF gain and the tuner gain. The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current on pin 12 (open-collector output). The tuner AGC voltage take over point is adjusted on pin 3. This allows the tuner and the IF SAW filter to be matched to achieve the optimum IF input level. Frequency detector, phase detector and video demodulator The IF amplifier output signal is fed to a frequency detector and to a phase detector. During acquisition the frequency detector produces a DC current which is proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. Via the loop filter the DC current of either frequency detector or phase detector is converted into a DC voltage, which controls the VCO frequency. The video demodulator is a linear multiplier, designed for low distortion and wide bandwidth. The vision IF input signal is multiplied by the in-phase component of the VCO output. The demodulated output signal is fed via an integrated low-pass filter (fg = 12 MHz) to the video amplifier for suppression of the carrier harmonics. VCO and travelling wave divider The VCO operates with a symmetrically-connected reference LC-circuit, operating at double vision carrier frequency. Frequency control is performed by an internal varicap diode. The voltage to set the VCO frequency to the actual frequency of double vision carrier frequency, is also amplified and converted for the AFC output current. The VCO signal is divided-by-two in a travelling wave divider, which generates two differential output signals
TDA9800
with 90 degree phase difference independent of frequency. Video amplifier, buffer and noise clipping The video amplifier is a wide bandwidth operational amplifier with internal feedback. A nominal positive modulated video signal of 1 V (p-p) is present on the composite video output (pin 13). The input impedance of the 7 dB wideband buffer amplifier (with internal feedback) is suitable for ceramic sound trap filters. The CVBS output (pin 7) provides a positive video signal of 2 V (p-p). Noise clipping is provided internally. Sound demodulation The FM sound intercarrier signal is fed to pin 11 and through a limiter amplifier before it is demodulated. This achieves high sensitivity and high AM suppression. The limiter amplifier consists of seven internal AC-coupled stages, minimizing the DC offset. The FM-PLL demodulator consists of an RC-oscillator, loop filter and phase detector. The oscillator frequency is locked on the FM intercarrier signal from the limiter amplifier. As a result of this locking, the RC-oscillator is frequency-modulated. The modulating signal voltage (AF signal) is used to control the oscillator frequency. By this, the FM-PLL operates as an FM demodulator. The audio frequency amplifier with internal feedback is designed for high gain and high common mode rejection. The low-level AF signal output from the FM-PLL demodulator is amplified and buffered in a low-ohmic audio signal output stage (pin 9). An external decoupling capacitor on pin 10 removes the DC voltage from the audio amplifier input. By using the sound mute switch (pin 5) the AF amplifier is set to mute state.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC134). SYMBOL VP SOT146 at +120 C SOT163A at +100 C VI ts max V12 Tstg VESD Notes 1. Supply current IP = 69 mA at Tamb = +70 C. voltage on pins 1, 2, 7, 11, 13, 14, 15 and 19 short-circuit time tuner AGC output voltage storage temperature range electrostatic handling for all pins (note 2) PARAMETER supply voltage (pin 20) for a maximum chip temperature (note 1) 0 0 0 - - -25 - 8.8 5.5 VP 10 13.2 +150 300 MIN.
TDA9800
MAX. V V V s V
UNIT
C V
2. Equivalent to discharging a 200 pF capacitor through a 0 series resistor (negative and positive voltage). THERMAL RESISTANCE SYMBOL Rth j-a SOT146 SOT163A PARAMETER from junction to ambient in free air 73 K/W 85 K/W THERMAL RESISTANCE
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
CHARACTERISTICS The following characteristics apply for VP = 5 V; Tamb = +25 C; see Table 1 for input frequencies and picture to sound ratios; VilF = 10 mV RMS value (sync level); video modulation DSB; residual carrier: 10%; video signal in accordance with CCIR line 17 or NTC-7 Composite; measurements taken in Fig.3 unless otherwise specified SYMBOL VP IP Vi PARAMETER supply voltage (pin 20) supply current -1 dB video at output CONDITIONS note 1 MIN. 4.5 51 - - 70 80 within AGC range; B/G: f = 5.5 MHz; M/N: f = 4.5 MHz see Fig.4 38.9 MHz and 45.75 MHz 58.75 MHz B Ri Ci V1, 2 fVCO fVCO Vo ref -3 dB IF bandwidth input resistance (differential) input capacitance (differential) DC input voltage note 2 f = 2fPC IAFC = 0; note 3 fPC = 38.9 MHz fPC = 45.75 MHz fPC = 58.75 MHz fPC vision carrier capture range (negative) vision carrier capture range (positive) tacqu acquisition time BL = 60 kHz; note 4 125 - - - - 1.5 1.5 - 130 - 120 100 80 2 2 - - 20 - - - - - 30 MHz ppm/K mV mV mV MHz MHz ms 64 62 1.7 1.2 3.0 70 68 100 2.2 1.7 3.4 - - - 2.7 2.5 3.8 dB dB MHz k pF V - 5 60 TYP. MAX. 8.8 69 V mA V V mV mV dB UNIT
Vision IF input (pins 1 and 2) input sensitivity (RMS value) at 38.9 MHz and 45.75 MHz input sensitivity (RMS value) at 58.75 MHz maximum input signal (RMS value) at +1 dB video at output 38.9 MHz and 45.75 MHz maximum input signal (RMS value) at 58.75 MHz Vo int. internal IF amplitude difference between picture and sound carrier IF gain control 50 60 150 160 0.7 90 100 - - 1
GIF
upper cut-off frequency 70
True synchronous video demodulator maximum oscillator frequency for carrier regeneration oscillator drift (free running) as a function of temperature oscillator swing at pins 16 and 17 (RMS value)
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL Vi IF
PARAMETER IF input signal sensitivity (RMS value, pins 1 and 2) for PLL still locked for C/N = 10 dB
CONDITIONS
MIN.
TYP.
MAX.
UNIT
maximum IF gain; note 5 note 6 note 7 sound carrier off see Fig.7
- - -
50 100 -
90 140 4.5
V V A
Iloop V0 vid V13
FPLL loop offset current at pin 6
Composite video amplifier (pin 13) output signal (peak-to-peak value) sync level zero carrier level upper video clipping level lower video clipping level V0 FM R13 Iint13 I13 B H RR IF intercarrier level (RMS value) output resistance internal bias current for emitter follower maximum output sink current maximum output source current -3 dB video bandwidth suppression of video signal harmonics ripple rejection on pin 13
0.9 1.4 - -
1.0 1.5 2.6 0.3 170 - 2.5 - - 10 40 35
1.1 1.6 - 0.4 - 10 - - - - - -
V V V V V mV mA mA mA MHz dB dB
VP - 1.1 VP - 1.0 - sound carrier on; note 8 - - DC DC and AC C13 < 50 pF; RL >1 k C13 < 50 pF; RL >1 k; note 9 see Fig.9 1.8 1.4 2.0 7 35 32
CVBS buffer amplifier and noise clipper (pins 7 and 14) R14 C14 V14 Gv Vo CVBS input resistance input capacitance DC voltage at input voltage gain CVBS output signal on pin 7 (peak-to-peak value) CVBS output level pin 14 not connected note 10 sound carrier off; see Fig.3 upper video clipping lower video clipping sync level R7 Iint7 I7 B output resistance internal bias current for emitter follower maximum output sink current maximum output source current -3 dB video bandwidth C7 < 20 pF; RL > 1 k DC DC and AC 2.6 1.4 1.5 6 1.7 3.9 - - - 1.8 1.4 2.4 8 3.3 2 1.8 7 2.0 4.0 1.0 1.35 - 2.5 - - 11 4.0 3.0 2.1 7.5 2.3 - 1.1 - 10 - - - - k pF V dB V V V V mA mA mA MHz
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Measurements from IF input to CVBS output (pin 7) 330 between pins 13 and 14, sound carrier off Vo CVBS Vo CVBS output signal on pin 7 (peak-to-peak value) deviation of CVBS output signal at B/G black level tilt G B S/N(W) 0.92/1.1 2.76/3.3 C H RR differential gain differential phase -3 dB video bandwidth signal-to-noise ratio; weighted intermodulation at `blue' intermodulation at `yellow' intermodulation at `blue' intermodulation at `yellow' residual vision carrier (RMS value) suppression of video signal harmonics ripple rejection on pin 7 50 dB gain control 30 dB gain control note 11 CCIR line 330 or NTC-7 Composite CL < 20 pF; RL > 1 k see Fig.5 and note 12 f = 0.92 or 1.1 MHz; see Fig.6 and note 13 f = 2.76 or 3.3 MHz; see Fig.6 and note 13 fundamental wave harmonics note 9 see Fig.9 1.7 - - - - - 6 56 56 58 56 57 - - 35 25 - - note 11 maximum gain minimum gain 0.85 17 0 - 2.0 - - - 2 1 8 59 62 64 62 63 1 1 40 28 2.3 0.5 0.1 1 5 3 - - - - - - 10 10 - - V dB dB % % deg MHz dB dB dB dB dB mV mV dB dB
AGC detector (pin 19) tresp response to an increasing amplitude step of 50 dB in input signal response to a decreasing amplitude step of 50 dB in input signal I19 V19 charging current discharging current AGC voltage 1 50 1.1 22 see Fig.4 see Fig.4 10 100 1.35 27 - ms ms mA A V
VP - 0.7 V
July 1994
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL Tuner AGC (pin 12) Vi
PARAMETER
CONDITIONS -
MIN. - - - -
TYP.
MAX.
UNIT
IF input signal for minimum starting point of tuner take over (RMS value) IF input signal for maximum starting point of tuner take over (RMS value)
input at pins 1 and 2; RTOP = 22 k input at pins 1 and 2; RTOP = 0 from external source I12 = 1.7 mA I12 = 0.4 mA see Fig.4 no tuner gain reduction maximum tuner gain reduction
5 - 13.2 0.2 0.06
mV mV V V dB/K
50 - - -
V12 V12 I12
allowable voltage saturation voltage variation of take over point by temperature sink current
0.02
- 1.7 -
0.1 2.0 6
0.3 2.6 8
A mA dB
GIF
IF slip by automatic gain control
tuner gain current from 20 to 80% see Fig.8 and note 14 note 15 38.9 MHz 45.75 MHz 58.75 MHz
AFC circuit (pin 15) S control steepness I15/f
-0.6 -0.45 -0.38 - - 160 160 -
-0.72 -0.6 -0.5 - 0.3 200 200 20
-0.84 -0.75 -0.62 20 0.5 240 240 30
A/kHz A/kHz A/kHz ppm/K V V A A A
fIF V15 I15 I15
frequency variation by temperature output voltage upper limit output voltage lower limit output current source output current sink residual video modulation current (peak-to-peak value)
IAFC = 0; note 3 see Fig.8
VP - 0.5 VP - 0.3 -
Sound mute switch (pin 5) VIL VIH IIL mute V5 input voltage for MUTE-ON input voltage for MUTE-OFF LOW level input current audio attenuation DC offset voltage at switching (plop)
note 16 0 1.5 V5 = 0 V V5 = 0 V switching to MUTE-ON - 70 - - - -300 80 100 0.8 VP -360 - 500 V V A dB mV
July 1994
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS note 17 CCIR468-4 see Fig.11 AM: f = 1 kHz; m = 0.3 - -
MIN.
TYP.
MAX.
UNIT
FM sound limiter amplifier (pin 11) Vi FM input signal (RMS value, pin 11) for S/N = 40 dB for AM suppression AM = 40 dB maximum input signal handling (RMS value) AM R11 B V11 fi FM tacqu Vo AF AM suppression input resistance -3 dB IF frequency response of sound IF DC voltage
200 1 - 50 600 - 2.6 - - - 350 - 3 - -
300 - - - 720 10 2.9
V mV mV dB MHz V
200 see Fig.10; AM: f = 1 kHz; m = 0.3 lower and upper cut-off frequency 46 480 3.5 2.3
FM-PLL sound demodulator and AF output (pin 9) note 17 catching range of PLL holding range of PLL acquisition time AF output signal (RMS value, pin 9) maximum output signal handling Vo fAF V10 temperature drift of AF output signal frequency deviation DC voltage at decoupling capacitor THD < 1.5%; note 18 voltage dependent on VCO frequency; note 19 fAF = 27 kHz; see Fig.11 THD < 1.5% 4 3.5 - 280 0.8 - - 1.2 7 8 4 420 - 7 50 2.2 MHz MHz s mV V 10-3 dB/K kHz V
R9 RL V9 B THD S/N (W) VSC RR
output resistance load resistance (pin 9) DC voltage -3 dB audio frequency bandwidth total harmonic distortion signal-to-noise ratio, weighted residual sound carrier and harmonics (RMS value) ripple rejection on pin 9 see Fig.9 without ceramic filter CCIR468-4; see Fig.11
- 2.2 1.6 95 - 50 - 26
100 - 2.0 120 0.1 55 - 30
- - 2.4 - 0.5 - 75 -
k V kHz % dB mV dB
Measurements from IF input to audio output (pin 9) 560 between pins 13 and 11; note 20 S/N (W) weighted signal-to-noise ratio 6 kHz sinusoidal waveform black picture white picture colour bar 27 kHz FM deviation; CCIR468-4; 50 s (75 s at standard M) de-emphasis; with offset alignment on pin 4 black-to-white sync only 39 40 39 39 46 48 46 46 - - - - dB dB dB dB
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
Notes 1. Values of video and sound parameters are decreased at VP = 4.5 V.
TDA9800
2. Loop bandwidth BL = 60 kHz (natural frequency fn = 15 kHz; damping factor d = 2 calculated with grey level and FPLL input signal level). Resonance circuit of VCO: Qo > 50; Cext = 8.2 pF; Cint 8.5 pF (loop voltage about 2.7 V). 3. Temperature coefficient of external LC-circuit is equal to zero. 4. Vi IF = 10 mV (RMS value); f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 5. Vi IF signal for nominal video signal. 6. Transformer at IF input (Fig.3). The C/N ratio at IF input for `lock-in' is defined as the vision IF input signal (sync level, RMS value) in relation to a superimposed, 5 MHz band-limited white noise signal (RMS value); video modulation: white picture. 7. Offset current measured between pin 6 and half of supply voltage (V = 2.5 V) under the following conditions: no input signal at IF input (pins 1 and 2) and IF amplifier gain at minimum (V19 = VP), pin 4 (phase adjust) open-circuit. 8. The intercarrier output signal is superimposed to the video signal at pin 13 and can be calculated by the following V iSC V iSC V 13 interc. ( p-p ) formula: 20 log --------------------------------------- = ----------- dB + 6.9 dB 2 dB with ----------- dB = sound to picture carrier ratio at IF V iPC V iPC 1V ( p-p ) input (pins 1 and 2 in dB and 2 dB = tolerance of intercarrier output amplitude Vo FM. 9. Measurements taken with SAW filter G1962; modulation: VSB, fvideo > 0.5 MHz, loop bandwidth BL = 60 kHz. 10. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p). If no sound trap is applied a 330 resistor must be connected from output to input (from pin 13 to pin 14). 11. The leakage current of the AGC capacitor has to be < 1 A to avoid larger tilt. 12. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 7). B = 5 MHz weighted in accordance with CCIR-567 at a source impedance of 50 . 13. 0.92/1.1 = 20 log (Vo at 4.4 (3.58) MHz / Vo at 0.92 (1.1) MHz) + 3.6 dB; 0.92/1.1 value at 0.92 (1.1) MHz related to black/white signal. 2.76/3.3 = 20 log (Vo at 4.4 (3.58) MHz / Vo at 2.76 (3.3) MHz); 2.76/3.3 value at 2.76 (3.3) MHz related to colour carrier. 14. To match the AFC output signal to different tuning systems a current source output is provided (Fig.8). 15. Depending on the ratio C/Co of the LC resonance circuit of VCO (Qo > 50; Co = Cint + Cext; Cext = 8.2 pF; Cint 8.5 pF). 16. No mute state is also valid for pin not connected. 17. Input level for second IF from an external generator with 50 source impedance, AC coupled with 10 nF capacitor, fmod = 1 kHz, 27 kHz (54% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pin 19 has to be connected to positive supply voltage. S/N and THD measurements are taken at 50 s (75 s at standard M) de-emphasis. 18. To allow higher frequency deviation, the resistor Rx on pin 10 (see Fig.12) has to be increased to a value which does not exceed the AF output signal of nominally 0.35 V for THD = 0.1% (Rx = 4.7 k provides -6 dB amplification). 19. The leakage current of the 2.2 F capacitor is < 100 nA. 20. For all S/N measurements the used vision IF modulator has to meet the following specification: - Incidental phase modulation for black-to-white jump less than 0.5 degree.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
Table 1 Input frequencies and carrier ratios. B/G STANDARD picture carrier sound carrier picture to sound carrier ratio fPC fSC SC 38.9 33.4 13 M/N STANDARD 45.75 41.25 7
TDA9800
M STANDARD 58.75 54.25 7
UNIT MHz MHz dB
22 k (62 k) VP = 5 V (9 V) 10 F 10 nF 22 k (62 k) 0.1 F 330 560 VCO1 16 AFC 15 Vi(vid) 14 Vo(vid) 13 12 TAGC Vi IC 11 1 V (p-p)
AFC video and intercarrier tuner AGC
2.2 F VP 20 CAGC 19 GND 18
see (1) table VCO2 17
TDA9800
1 vision IF 50 1:1 Vi VIF1
2 Vi VIF2
3 TOP
4 CCS
5 MUTE
6 TPLL 390 0.1 F
7 Vo CVBS
8 n.c.
9 Vo AF
10 CAF 2.2 F
13 k
takeover point
sound mute
MED331
Vo AF CVBS 2 V (p-p)
Fig.3 Test circuit.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
handbook, full pagewidth
70
MED332
GIF (dB)
60 I12 (mA) 0 40 (1) (2) (3) 30 (4) 0.6 0.2
50
20
1.0
10
1.4
0 -10
1.8 2.0 0 1 2 3 4 V19 (V) 5
Fig.4 IF AGC (dashed) and tuner AGC as a function of take over point adjustment.
handbook, halfpage
80
MED333
handbook, halfpage
-3.2 dB -13.2 dB -24 dB -10 dB
S/N (dB) 60
-13.2 dB -24 dB
40
SC CC BLUE
PC
SC CC YELLOW
PC
MED334
20
0 -60 0.06
-40 0.6
-20 6 10
0
20
SC = sound carrier level ; with respect to TOP sync level. CC = chrominance carrier level ; with respect to TOP sync level. PC = picture carrier level ; with respect to TOP sync level.
Vi IF(rms)(dB) 60 600 Vi IF(rms)(mV) Sound shelf attenuation: 17 dB.
Fig.5
Typical signal-to-noise ratio as a function of IF input signal.
Fig.6
Input conditions for intermodulation measurements.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
handbook, halfpage
2.6 V 2.5 V
zero carrier level white level
1.8 V 1.5 V sync level
MED335
Fig.7 Video signal levels on output pin 13.
Fig.8 Measurement conditions and typical AFC characteristic.
handbook, full pagewidth
VP VP = 5 V TDA9800 100 mV (fripple = 70 Hz)
MED337
t
Fig.9 Ripple rejection condition. July 1994 15
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
handbook, full pagewidth
0
MED338
AM (dB) -20
-40
-60
-80
-100 10-1
1
10
102
Vi IC (mV)
103
Fig.10 Typical AM suppression of FM sound demodulator.
MED339
handbook, full pagewidth
370 Vo AF (mV RMS) 360 (1)
60 S/N (W) (dB) 50
(2) 350 40
340
30
330 10-1
20
1
10
102
Vi FM (mV)
103
Fig.11 Typical AF output signal and signal-to-noise ratio.
July 1994
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
22 k (62 k) VP = 5 V (9 V) 10 F 10 nF 22 k (62 k) 0.1 F sound trap 15 H sound filter VCO1 16 AFC 15 Vi(vid) 14 Vo(vid) 13 TAGC 12 330 1 V (p-p) 560
(2)
handbook, full pagewidth
AFC video and intercarrier tuner AGC
(2)
2.2 F VP 20 CAGC 19 GND 18
see (1) table VCO2 17
12 V (9 V)
(2)
Vi IC 11
TDA9800
1 Vi VIF1 vision IF 50 SAW filter G1962
2 Vi VIF2
3 TOP
4 CCS
5 MUTE
6 TPLL 390 0.1 F
7
8
9 Vo AF 2.2 k CAF
10 CAF Rx
(3)
Vo CVBS n.c.
13 k IF input
2.2 F CVBS 2 V (p-p) Vo AF
takeover point
sound mute
(1) depends on tuner
22 nF
MED340
Fig.12 Application circuit.
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Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
handbook, full pagewidth
120 IF gain range 64 (<70) dB
(1)
antenna input (dBV) 100 SAW insertion loss 20 dB
video 1 V (p-p) IF signals (RMS value) 10-1 (V) 0.66 x 10-1
tuner gain control range 80
6 dB IF slip
10-2
64 dB IF AGC 60
TOP 10-3 0.66 x 10-3
SAW insertion loss 20 dB 40 40 dB RF gain
10-4 0.66 x 10-4
20
10-5 0.66 x 10-5
VHF/UHF tuner
IF SAW filter
IF amplifier, demodulator and video TDA9800
MED341
(1) depends on TOP
Fig.13 Front end level diagram.
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full pagewidth
TAGC 12 + 2 k 2 mA 11.5 k
July 1994
VCO1 AFC 16 14 3.6 V + 6.6 k 2 k 3.6 V 10 pF 2.5 mA 670 11 5.5 k 15 pF 5.5 k + 1 k 1 k 20 k 13 + 200 A 1 k 5 k + + 15 Vi(vid) Vo(vid) 17 3V Vi IC
CAGC
GND VCO2
Philips Semiconductors
19 +
18
+
+
+
1 k
1 mA
VP mute + +
20
+
TDA9800
57 k 2.5 k 5 k +
VIF-PLL demodulator and FM-PLL detector
+
Vi VIF1 2.5 A +
1 10 190 A VCO 5 k + + + 25 A 18 k 16 k 2.5 mA 5 MUTE 6 TPLL 7 Vo CVBS 3.65 V 50 A 40 A + + 6.4 k 1.5 pF 100 9 Vo AF + +
19 Fig.14 Internal circuits.
1.1 k
CAF
3.6 V
+
1.1 k
Vi VIF2
2
+
3.6 V
20 k
9 k
2 mA 8 n.c.
MED342
3
4
TOP
CCS
Preliminary specification
TDA9800
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
PACKAGE OUTLINES DIP20: plastic dual in-line package; 20 leads (300 mil)
TDA9800
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC EIAJ SC603 EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-05-24
July 1994
20
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)
0.9 0.4
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.050 0.055 0.394 0.016
0.035 0.004 0.016
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013AC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
July 1994
21
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TDA9800
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
July 1994
22
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA9800
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
July 1994
23

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